This section describes background subject matter related to the disclosed embodiments of the present invention. There is no intention, either express or implied, that the background art discussed in this section legally constitutes prior art.
Deep recessed structure etching is one of the principal technologies currently being used to fabricate semiconductor and microstructure devices, and is an enabling technology for many microelectromechanical systems (MEMS) applications. Strict control of the etch profile is required for these new, complex devices to perform satisfactorily. Obtaining a controlled sidewall profile, where the taper angle ranges from about 85° to about 92° in combination with a smooth sidewall surface has proved a difficult task in many instances.
Through substrate vias (TSVs), which are frequently through silicon vias, with a sidewall taper angle ranging from about 85° to about 90° are particularly useful in various electronics packaging applications. The TSVs enable the attachment of various components to each other, frequently in manners which enable electrical connection from device to device. Etched silicon trenches with a sidewall taper angle of 85° up to 92° are useful in a variety of MEMS devices such as optical switches, tunable capacitors, accelerometers, and gyroscopes, by way of example and not by way of limitation.
Plasma etching of deeply recessed structures, where the depth of the recess is at least 10 μm, and may be as great as about 500 μm, typically requires a combination of reactive chemical etching with physical etching, which typically employs ion bombardment. The physical etching enables anisotropic, directional etching necessary to produce vertical sidewalls on an etched trench, for example.
Numerous processing techniques have been proposed for deep etching. One technique for forming trenches having nearly vertical sidewalls employs a protective coating in the area of the opening to the trench. The material used to form the coating is resistant to the etchant being used to etch the trench. The coating may be applied continuously or may be applied at specific points in the trench formation process. In a related method, a silicon substrate is covered with a patterned mask which exposes select areas of a silicon substrate to plasma etching. Anisotropic etching is accomplished using alternating plasma etching and polymer formation steps.
In other etching methods the same gas mixture is used during plasma etching of a feature and during formation of a protective film to protect etched surfaces. In one method, by changing the DC substrate bias, the process is said to be switched between a first state in which the primary reaction is substrate etching and a second state in which the primary reaction is deposition of a film on the substrate surface.
In another method, the etch and polymerization steps are carried out in an alternating, repetitive manner until etching is complete. It is possible to decrease the quantity of polymer deposited during the course of the polymer deposition steps, if desired.
In another method, etching of a trench in a semiconductor substrate is carried out using alternatively reactive ion etching and deposition of a passivation layer by chemical vapor deposition. The method includes varying one or more of a number of process variables with time during the etch process. The variation in process parameters is generally illustrated as being periodic, where the periodic variation corresponds to at least one sinusoidal, square, or sawtooth waveform. The method includes not only the cyclic process providing a reactive etching step followed by deposition of a passivation layer to protect sidewall surfaces, but also includes variance over time from process cycle to process cycle, as a means of avoiding the formation of significant surface roughness on the etched trench sidewalls. Such methods are complicated, requiring extensive process control apparatus and programmed computer control of the apparatus.
One disadvantages of the more recent deep feature etching processes which attempt to provide a smoother sidewall during etching of the feature is that the computerized control, combined with the apparatus functions which have to be carried out, tend to reduce the speed at which etching of the feature occurs. Further the complexity of the chemistry involved is increased, requiring the handling of more reactants, many of which are difficult to store and handle.
In yet another method, etching of deeply recessed features such as deep trenches of 5 μm or more in depth, a stabilizing etchant species is applied continuously throughout etching of the deeply recessed feature. The stabilizing etchant species is applied both during an etch step, in which an additional, different etchant species is applied intermittently, and during a polymer depositing step which is also applied intermittently during the deep feature etching process.
In another sidewall smoothing technique, sidewall smoothing is applied subsequent to etching of the deeply recessed feature into a silicon substrate. However, it appeared that this may have caused a surface porosity which was said to have been observed at the silicon sidewall surface after the smoothing method has been carried out. In some instances, where the amount of porosity present after the smoothing has been carried out may present a problem, some have tried oxidizing the silicon surface, followed by exposure to an HF dip or to vaporous HF to remove the oxide. Depending on the device which is being fabricated, there may be exposed elements of the device which cannot tolerate exposure to HF.
There remains a need for an improved method of etching deep features (more than 200 μm in depth, for example) which require a particularly smooth sidewall.